Hawkes International Semiconductor                  
              Probing Nano Electronic Devices
Device E-Test and Our Mission

Hawkes International Semiconductor specializes in advanced wafer-level probing
of electronic devices, and is honored to provide consulting services in the
following areas.

  • Electrically characterizing nano semiconductor (Si, Ge, III-V) devices and
    materials via proven methods based on device physics
  • Systematically analyzing electrical parameters to debug device physical
    structures and identify process and integration issues
  • Correlating e-test result to device manufacture processes and monitoring
    fab processes using SLM or PCM
  • Segmenting the root causes of device performance issues and proposing
    fab process or integration fixes
  • Advanced test code development for device parametric analysers (e.g.
    Agilent B1500A and 4156-series) interfaced to waveform/pulse generators,
    switch matrix and automatic probe stations.
A state-of-the-art integrated circuit (IC) contains millions or even billions of
individual semiconductor devices such as transistors (FET, BJT), diodes,
capacitors, resistors and memory cells etc. It is critical to electrically characterize
and optimize the performance of these devices separately. This is accomplished
by manufacturing various electric test (e-test) structures in scribe lines between IC
dies on silicon wafers, and by performing on-wafer probing to measure their
device parameters. These e-test structures are called scribe line monitors (SLM)
or process control monitors (PCM). The SLMs are of great importance to IC
technology development because they are the earliest testable devices available
as soon as the first metal layer is formed on the first silicon.

In production e-test, device parameters are routinely obtained via high-speed
automated spot measurements. Each spot measurement retrieves a set of electric
output signals under a preset of electric input biases.  When some device
parameters are out of specified limits or IC chips fail to function as expected,
experts will performed more advanced device characterization of selected e-test
structures in laboratory. This typically involves the measurement of  series of
device output signal curves by sweeping electric input voltages or currents over
certain ranges. Sometimes wafer temperature is varied or light illumination is used
during measurement. The test structures may be cut for scanning or transmission
electron microscopic (SEM or TEM) imaging and other analyses. Systematic data
analysis and statistical correlation to wafer process conditions are carried out.
This is a daunting task because a wafer process flow may contain as many as
hundreds of fabrication steps. The ultimate goal of device experimental
investigation is to understand and identify the root-causes in either IC design or
wafer processing. Once the potential root causes are found, design or process
fixes are  proposed, executed and validated in the next wafer lots until all device
parameters are within specified limits.

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We are your Device Lab.